HermiCache: Hardware-Enforced Ownership-Based Cache Isolation for Trusted Execution Environments
2027 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) — 2026
Trusted Execution Environments (TEEs) protect security-sensitive code and data from untrusted software, but shared caches remain a source of line-residency leakage through cross-domain reuse and replacement. In particular, eviction-based attacks rely on the ability of one domain to displace cache lines used by another. Existing hardware defenses commonly address this problem through cache partitioning, which reserves capacity and can reduce utilization, or through randomization, which provides probabilistic protection. This paper presents HermiCache, a hardware-enforced line-residency isolation mechanism for TEEs. HermiCache preserves the conventional set-associative cache organization but adds lightweight ownership metadata to each cache line. The cache uses this metadata during lookup and replacement: a protected line can be reused or selected for replacement only by its owning security domain. This enforces deterministic protection for private enclave cache lines by eliminating attacker-induced eviction of protected victim-owned lines and preventing cross-Enclave IDentifier (EID) reuse of protected cache state. We implement HermiCache at RTL in the open-source CVA6 RISC-V core and integrate it with the Keystone TEE framework. FPGA synthesis shows less than 5% SoC-level hardware overhead with no BRAM increase or timing degradation. Full-system gem5 evaluation shows up to 5% IPC degradation across protected and non-protected workloads, while attacker-induced replacement of protected victim-owned lines is eliminated in our cache-residency security experiment.
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