@inproceedings{elmnaouri:hal-05041492,
  TITLE = {{Enforcing RISC-V TEE Security Against Cache Timing Attacks}},
  AUTHOR = {Elmnaouri, Oussama and Cotret, Pascal and Lapotre, Vianney and Lagadec, Lo{\"i}c},
  URL = {https://hal.science/hal-05041492},
  BOOKTITLE = {{International Workshops on Cryptographic architectures embedded in logic devices}},
  ADDRESS = {Autrans (Grenoble), France},
  YEAR = {2025},
  MONTH = Jun,
  HAL_ID = {hal-05041492},
  HAL_VERSION = {v1},
}