Introduction In the context of a research project with a PhD student, we have to work on the microarchitecture of a CVA6 and make it compatible with some JIT code (VMIL'23 talk). The official CVA6 repository has recently pushed new scripts to create the SDK. As we already started our work, we want to generate the SDK with the old method on a fork of the CVA6.. Repositories and environment variables It is assumed you have downloaded two repositories in your home directory ($HOME):

Introduction The idea of this post is to explore how we can add a CSR in the CVA6 processor and how we can check its behavior in GTKwave. In this tutorial, we will try to add a CSR named dmpcfg at address 0x3f0. Adding a CSR in the CVA6 HDL code For the CVA6, CSRs are implemented in https://github.com/openhwgroup/cva6/blob/master/core/csr_regfile.sv. In this file, there are two important processes: csr_read_process: https://github.com/openhwgroup/cva6/blob/master/core/csr_regfile.sv#L188, the CSR read logic.

Introduction CVA6 is a processor from the OpenHW Group: 64-bit, Linux-capable and written in SystemVerilog. Requirements In order to generate a CVA6 model with export, Verilator must be installed from sources as the Makefile requires a C++ file https://github.com/pcotret/cva6/blob/vcd_patch/Makefile#L551. For this tutorial, Verilator 4.110 was chosen as it is used in the official CI flow. 1 2 3 4 5 6 7 8 git clone https://github.com/verilator/verilator cd verilator git pull git checkout v4.

The Rocket Chip is poorly documented. In order to understand the structure of the Scala code, https://github.com/freechipsproject/diagrammer is a tool able to generate Dot diagrams helping to understand what’s inside this processor. NB: it has been on Debian Bullseye 1 2 3 4 5 6 7 # Prerequisites, dot interactive viewer sudo apt install xdot # Cloning the diagram generation tool git clone https://github.com/freechipsproject/diagrammer cd diagrammer git checkout v1.3.3 ./diagram.sh -i freechips.

The idea is to debug a simple program on an emulated Rocket. The procedure is well defined on the officiel Rocket repository. This post basically summarizes the needed steps. Generating the emulator Let’s say you have a default rocket-chip repository. You need to add a Remote Bit-Bang client in the emulator by modifying src/main/scala/system/Configs.scala: 1 2 3 4 5 @@ -86,3 +86,4 @@ class MMIOPortOnlyConfig extends Config( class BaseFPGAConfig extends Config(new BaseConfig ++ new WithCoherentBusTopology) class DefaultFPGAConfig extends Config(new WithNSmallCores(1) ++ new BaseFPGAConfig) +class DefaultConfigRBB extends Config(new WithJtagDTMSystem ++ new WithNBigCores(1) ++ new WithCoherentBusTopology ++ new BaseConfig) Building the emulator 1 2 rocket-chip$ cd emulator emulator$ CONFIG=freechips.

Verilator basics Basic steps for a simulation of an ALU in Verilator is given in this link. GTKWave customization There are two way to customize the GTKWave rendering : TCL scripts: https://gist.github.com/pcotret/cfff0b6fe449c308f6e34450c11baaa9 https://ughe.github.io/2018/11/13/gtkwave-automation gtkwaverc configuration file: Example: https://github.com/gtkwave/gtkwave/blob/master/gtkwave3-gtk3/examples/gtkwaverc Command 1 gtkwave -S tcl_script.tcl waveform.vcd GTKWave will look for .gtkwaverc in: Locally where GTKWave is launched. In the user home directory.