SCRATCHS
Ensure by construction that a security sensitive code is immune to timing side-channel attacks, focusing RISC-V.
Dec 18, 2024
Hardware Security for Just-in-Time Compilation in Language Virtual Machines
Work on the RISC-V ISA, extending it for the security of language VMs.
Mar 29, 2024
HardBlare
Propose an heterogeneous solution for embedded software security. Relies on ARM debug components.
Sep 1, 2018