paper-conference

On The Effect of Replacement Policies on The Security of Randomized Cache Architectures
Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections
JIT Compiler Security through Low-Cost RISC-V Extension
Porting a JIT compiler to RISC-V: Challenges and Opportunities
Benchmarking quantized neural networks on FPGAs with FINN
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components
A MIPS-based coprocessor for information flow tracking in ARM SoCs
Monitoring information flows in heterogeneous SoCs with a dedicated coprocessor