paper-conference

Cache locking against cache-based side-channel attacks
Nicolas Gaudin, Vianney Lapôtre, Pascal Cotret, Guy Gogniat
On The Effect of Replacement Policies on The Security of Randomized Cache Architectures
Moritz Peters, Nicolas Gaudin, Jan Philipp Thoma, Vianney Lapôtre, Pascal Cotret, Guy Gogniat, Tim Güneysu
PDF
Enhancing Security in Heterogeneous Virtualized Systems: A Focus on I/O Attacks in the existence of IOMMU in a RISC-V architecture
Aya Jendoubi, Jean-Christophe Prévotet, Philippe Tanguy, Pascal Cotret
RISC-V Embedded AI for IDS Applications
Pierre Garreau, Pascal Cotret, Julien Francq, Jean-Christophe Cexus, Loïc Lagadec
PDF
Cache locking against cache-based side-channel attacks
Nicolas Gaudin, Vianney Lapôtre, Pascal Cotret, Guy Gogniat
PDF
Gigue: A JIT Code Binary Generator for Hardware Testing
Quentin Ducasse, Pascal Cotret, Loïc Lagadec
PDF Video Source Document
Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections
Jean-Loup Hatchikian-Houdot, Nicolas Gaudin, Pascal Cotret, Frédéric Besson, Guy Gogniat, Guillaume Hiet, Vianney Lapôtre, Pierre Wilke
PDF
JIT Compiler Security through Low-Cost RISC-V Extension
Quentin Ducasse, Pascal Cotret, Loïc Lagadec
PDF
Porting a JIT compiler to RISC-V: Challenges and Opportunities
Quentin Ducasse, Guille Polito, Pablo Tesone, Pascal Cotret, Loïc Lagadec
PDF Slides DOI
Securing a high-level language virtual machine through its ISA: Pharo as a case study
Quentin Ducasse, Pascal Cotret, Loïc Lagadec