Publications

(2024). On The Effect of Replacement Policies on The Security of Randomized Cache Architectures. In 19th ACM ASIA Conference on Computer and Communications Security (ACM AsiaCCS 2024).

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(2024). errouillage des lignes de cache pour la lutte contre les attaques par canaux auxiliaires exploitant les mémoires cache. In 1ère conférence française annuelle dédiée à la cyber embarquée et à son écosystème (CyberOnBoard 2024).

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(2023). Gigue: A JIT Code Binary Generator for Hardware Testing. In 2023 Workshop on Virtual Machines and Language Implementations.

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(2023). Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections. In SILM - IEEE Euro S&P workshop.

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(2023). JIT Compiler Security through Low-Cost RISC-V Extension. In RAW - 30th Reconfigurable Architectures Workshop.

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(2022). Porting a JIT compiler to RISC-V: Challenges and Opportunities. In MPLR - Managed Programming Languages and Runtimes 2022.

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(2021). Securing a high-level language virtual machine through its ISA: Pharo as a case study. In GDR SoC².

(2021). Benchmarking quantized neural networks on FPGAs with FINN. In SLOHA - DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures.

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(2019). Dis, c’est quoi là haut dans le ciel ? C’est un Linux, mon petit. In MISC magazine 104.

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(2018). A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. In Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

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(2018). A MIPS-based coprocessor for information flow tracking in ARM SoCs. In International Conference on Reconfigurable Computing and FPGAs (Reconfig).

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(2018). Monitoring information flows in heterogeneous SoCs with a dedicated coprocessor. In GDR SoC².

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(2018). Monitoring program execution (and more) on ARM processors. In Toulouse Hacking Convention.

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(2017). ARMHEx: A hardware extension for DIFT on ARM-based SoCs. In FPL2017 (27th International Conference on Field-Programmable Logic and Applications).

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(2017). A framework for efficient DIFT in real-world SoCs. In FPL2017 (27th International Conference on Field-Programmable Logic and Applications) - Demo session.

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(2017). DroneJack: kiss your drones goodbye !. In GDR SoC².

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(2017). ARMHEx: a hardware extension for information flow tracking on ARM-based platforms. In GDR SoC².

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(2017). ARMHEx: a hardware extension for information flow tracking on ARM-based platforms. In RESSI - Rendez-vous de la recherche et de l’enseignement de la sécurité des systèmes d’information.

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(2017). Pwning ARM Debug Components for Sec-Related Stuff. In Hack In the Box Security Conference - CommSec track 2017.

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(2016). Hit the KeyJack: stealing data from your daily wireless devices incognito. In Computer & Electronics Security Application Rendez-vous (C&ESAR 2016).

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(2016). Multi-standard OFDM transceiver for heterogeneous system-on-chips. In WinnComm Europe 2016.

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(2016). Towards a hardware-assisted information flow tracking ecosystem for ARM processors. In FPL2016 (26th International Conference on Field-Programmable Logic and Applications).

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(2016). A hardware coprocessor for Zynq-based Dynamic Information Flow Tracking. In CryptArchi (International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices).

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(2016). A portable approach for SoC-based Dynamic Information Flow Tracking implementations. In GDR SoC².

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(2016). Protection of heterogeneous architectures on FPGAs: an approach based on hardware firewalls. In Elsevier Microprocessors and microsystems, Volume 42.

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(2015). HardBlare: an efficient hardware-assisted DIFC for non-modified embedded processors. In CHES 2015 (Workshop on Cryptographic Hardware and Embedded Systems).

Poster

(2015). Embedded wavelet-based face recognition under variable position. In IS&T/SPIE Electronic Imaging, Real-Time Image and Video Processing 2015.

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(2015). Reconnaissance faciale basée sur les ondelettes robuste et optimisée pour les systèmes embarqués. In GRETSI.

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(2014). Protection des architectures hétérogènes sur FPGA : une approche par pare-feux matériels. In Techniques de l’Ingénieur, vol. IN175, pp. 1–10.

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(2012). Lightweight reconfiguration security services for AXI-based MPSoCs. In FPL (22nd International Conference on Field Programmable Logic and Applications).

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(2012). Security enhancements for FPGA-based MPSoCs: A boot-to-runtime protection flow for an embedded Linux-based system. In ReCoSoC (7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip).

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(2012). Self-reconfigurable security-enhanced communications in FPGA-based MPSoCs. In CryptArchi (International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices).

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(2012). Self-configuration of latency-efficient security enhancements for MPSoC communications monitoring. In GDR SoC².

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(2012). Bus-based MPSoC Security through Communication Protection: A Latency-efficient Alternative. In FCCM (International Symposium on Field-Programmable Custom Computing Machines).

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(2011). Security FPGA Analysis. In Security Trends for FPGAs, Springer, pp. 7-46.

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