Publications

(2023). Gigue: A JIT Code Binary Generator for Hardware Testing. In 2023 Workshop on Virtual Machines and Language Implementations.
(2023). Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections. In SILM - IEEE Euro S&P workshop.
(2023). JIT Compiler Security through Low-Cost RISC-V Extension. In RAW - 30th Reconfigurable Architectures Workshop.
(2022). Porting a JIT compiler to RISC-V: Challenges and Opportunities. In MPLR - Managed Programming Languages and Runtimes 2022.
(2022). Remarkable Challenges of High-Performance Language Virtual Machines. In Research Report Inria Lille - Nord Europe.
(2021). Securing a high-level language virtual machine through its ISA: Pharo as a case study. In GDR SoC².
(2021). Benchmarking quantized neural networks on FPGAs with FINN. In SLOHA - DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures.
(2019). Dis, c’est quoi là haut dans le ciel ? C’est un Linux, mon petit. In MISC magazine 104.
(2018). A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. In Asian Hardware Oriented Security and Trust Symposium (AsianHOST).
(2018). A MIPS-based coprocessor for information flow tracking in ARM SoCs. In International Conference on Reconfigurable Computing and FPGAs (Reconfig).